CS 501 Assignment No 3 Solution Fall 2019

Assignment No. 03

Semester: Fall 2019

Advance Computer Architecture – CS501

Objective of Assignment

Objective of this assignment is to increase the learning capabilities of the students about:

·         Interrupt Driven I/O

·        CPU Polling for I/O

·        Direct Memory Access

Rules for Assignment

It should be clear that your assignment will get credit only if:

·        The assignment is submitted before or on the due date.

·         The submitted assignment file is not corrupted or damaged.

·         The assignment is not copied (from another student or internet).

Uploading Instructions

            Read the following instructions carefully before uploading assignment:

·         Upload/Submit assignment in your VULMS assignment interface.

·         No assignment will be accepted through email.

·         Your assignment must be with .doc extension. (Any other format will not be accepted)

[the_ad id=”83882″]

NOTE

No assignment will be accepted after the due date via email in any case (whether it is the case of load shedding or internet malfunctioning etc.). Hence, refrain from uploading assignment in the last hour of deadline. It is recommended to upload solution file at least two days before its closing date.

If you find any mistake or confusion in assignment (Question statement), please consult with your instructor before the deadline. After the deadline, no queries will be entertained in this regard. Moreover, keep checking announcements section.

For any query, feel free to email at:

[email protected]

Thank You

Question # 01                                                                                                                    08 Marks

Suppose a 160GB hard drive is connected to computer system having a 32-bit Pentium-3 processor which is operating at a frequency of 500 MHz. The system employs DMA as I/O interface for data transfer. Before the data can be transferred using DMA, the processor needs the DMA controller to be set-up which requires 3000 clock cycles. Then, for each data transfer, additional 1000 clock cycles are required to handle interrupt. The hard drive transfers data using data blocks of 64 KB each at data transfer rate of 40 MB/s. Considering the given scenario, answer the following questions. What will be the total CPU time required to transfer the file using DMA?

Question # 02                                                                                                                    12 Marks

Assume a 64-bit processor operating at 600 MIPS having following devices attached to it:

·        A hard drive with a transfer rate of 8 MB/s.

·        A mouse which is required to be polled 30 times/seconds.

·        An optical drive connected through a 32-bit data bus with a transfer rate of 2MB/sec.

The processor employs polling technique to select the device to perform I/O operations where each polling operation requires 400 instructions. Determine the percentage of CPU time required to poll each of three devices.